Delegates tour the Saigon Hi-Tech Park’s Semiconductor Assembly and Test Training Laboratory, which opened on October 23, featuring 13 industrial machinery modules. — VNA/VNS Photo Thu Hoài

HCM CITY — The Saigon Hi-Tech Park (SHTP) Management Board on October 23 inaugurated the SHTP Semiconductor Assembly and Test Training Laboratory (SHTP ATP Lab), aiming to enhance practical training and bridge the gap between academic education and industry demands.

The inauguration was held to mark the 24th anniversary of SHTP's establishment (October 24, 2002 - 2026).

The facility, directly managed and operated by the SHTP Training Centre in collaboration with the HCM City College of Science and Technology and specialised industry partners, was developed using 13 industrial machinery modules from an assembly and testing line donated by Intel Products Vietnam Co., Ltd.

The laboratory, set up inside an ISO 8 cleanroom environment, enables trainees to access specialised technical standards and operating procedures used in the semiconductor industry.

Unlike conventional training programmes that rely mainly on theory and simulation, it allows students, engineers, and technicians to practice directly on industrial equipment to build operational skills, process control expertise, quality evaluation, and troubleshooting capabilities.

A key highlight of the lab is the Flip-Chip Ball Grid Array (FCBGA) packaging line, which uses micro-solder bumps to connect the chip directly to the substrate, increasing connection density, improving signal transmission efficiency, and meeting high-performance integrated circuit requirements.

The line features 10 automated machines that perform consecutive stages, including substrate tray loading, flux dispensing, chip placement, optical inspection, reflow soldering, testing, sorting, and final product tray loading.

In addition to the packaging system, the lab features an Advantest T2000 automated test system paired with a Delta Pyramid 6200 Handler for electrical parameter testing and functional evaluation.

It is also equipped with an ICOS CI-T130 automated optical inspection system utilising computer vision to detect visual defects such as cracks, soldering errors, surface quality issues, and chip markings.

The combination of packaging and testing machinery gives learners practical insight into crucial back-end processes within the semiconductor value chain.

The facility plans to offer training for positions such as assembly process engineers, semiconductor test engineers, quality control engineers, and equipment maintenance technicians.

The facility, developed under a shared-use laboratory model, allows universities, colleges, research institutes, and enterprises to co-utilise infrastructure for training, research, and workforce development.

The SHTP Training Centre will coordinate with academic and research institutions to integrate practical modules into standard curricula, expand short-term training programmes, upskill lecturers and engineers, and support applied research projects tailored to industry needs.

Nguyễn Kỳ Phùng, lead of the SHTP Management Board, said the lab is expected to bridge the gap between theoretical training and actual technical requirements at enterprises, enabling trainees to enhance their capacity in research, testing, packaging, and microchip verification directly in Việt Nam. — VNS